Reference circuits may be provided in a number of different configurations. A typical bandgap voltage reference circuit is based on addition of two voltages having equal and opposite temperature coefficients.
FIG. 1 shows in schematic form an example of a known bandgap voltage reference. It consists of a current source, I1, a resistor, r1, and a diode, d1. It will be understood that the operation of the diode is equivalent to that of a forward biased base-emitter voltage of a bipolar transistor. The voltage drop across the diode has a negative temperature coefficient, TC, of about −2.2 mV/C and is usually denoted as a Complementary to Absolute Temperature, or CTAT voltage, as its output value decreases with increasing temperature. The current source I1 is desirably a Proportional to Absolute Temperature, or a PTAT source, such that the voltage drop across r1 is PTAT voltage. In this way as absolute temperature increases, the voltage output will also increase. The PTAT current is generated by reflecting across a resistor a voltage difference (ΔVbe) of two forward-biased base-emitter junctions of bipolar transistors operating at different current densities. Such operation is well known in the art.
FIG. 2 represents in graphical form, the operation of the circuit of FIG. 1. By combining the CTAT voltage, V_CTAT, of d1 with the PTAT voltage, V_PTAT, resultant from the voltage drop across r1 it is possible to provide a relatively constant output voltage Vref over a wide temperature range—the two combine to provide a Vref which is substantially flat across temperature. However, in this arrangement there are two unknowns which must be combined in a prescribed configuration to provide the desired output. The first unknown is the CTAT voltage which is very strongly dependent on process parameters. The geometry of the corresponding junction and the difference in doping level have relatively large variations from lot to lot and die to die. These variations are reflected as changes in voltage drop across the diode both at 0K and at room temperature. Such variations can lead to inaccuracies in the resultant Vref. The voltage drop across the diode at 0K is called the bandgap voltage, denoted Eg0. If the PTAT and CTAT voltages are well matched, the value of the reference voltage will equal the bandgap voltage, Eg0. While not affected in the same manner by process variations as the CTAT voltage is, the PTAT voltage is also affected by various errors of the circuit, especially by offset voltages of the transistors and mismatches of the resistors.
There are different approaches to trim a bandgap voltage reference. The first method is to trim the reference at a so called “magic” value. An example of how this trimming method is achieved is illustrated in FIG. 3. This example assumes that the second order error, sometimes called the “curvature” error, which is inherently present in bandgap voltage references, is removed such that the reference voltage variation vs. temperature is a straight line. If the PTAT and CTAT voltages are well balanced (denoted by PTAT_0, CTAT_0), the reference voltage Vref_0, is equal to the diode's bandgap voltage, Eg_0, and it has zero temperature coefficient, TC. However, as mentioned above, due to the process variations used in the manufacturing process, the diode's bandgap voltage can change from Eg_0 to Eg_1 and the voltage drop across the diode changes from CTAT_0 to CTAT_1. If we assume that the PTAT voltage remains unchanged (PTAT_0=PTAT_1) the resulting voltage reference (Ref_1) at room temperature (T0) drops from Vref_0 and it also has a positive slope, i.e. the output is not constant across temperature. It will be understood that both changes are unwanted. To compensate for the drop in the value of the reference voltage Vref, the PTAT voltage can be trimmed at room temperature to provide the “magic” value for the reference voltage, Vref_0. To achieve this modification, the PTAT voltage is accordingly changed from PTAT_0 to PTAT_2. The resulting reference voltage (Ref_2) has the “magic” value only at room temperature but its TC is even worse. As a result it is evident that while this method can guarantee a nominal value at room temperature, it does not provide a satisfactory voltage reference as the temperature coefficient response is not good and the reference will therefore vary with varying temperatures.
An alternative technique is to utilise two trimming steps, at two different temperatures. At a first temperature, say room temperature, the reference voltage is measured. But because Eg_0 changes from die to die, this value is often different from the desired value. At a second temperature, usually a higher temperature, the reference is trimmed to the same value as it was at first temperature. This requirement to provide trimming to the same value as at the first temperature can be/addressed by use of a third trimming step to gain the resulting reference voltage to the desired value. As a result when a lot of prior art voltage references are trimmed at two different temperatures, an expensive tracking procedure is required to identify the part from the lot and its corresponding voltage value.
An example of a known more detailed CMOS bandgap voltage reference is presented on FIG. 4. Two parasitic substrate bipolar transistors, Q1 and Q2, are operating at different collector current density, usually by scaling of their emitter areas by an appropriate factor n. An amplifier A1 controls the common gate of three identical PMOS transistors, M1, M2 and M3 such that, from the supply line, three identical currents are forced and a voltage is generated at the Vref node. If the base current of the bipolar transistors (Q1, Q2) can be neglected and assuming an ideal amplifier A1, then the collector current density ratio is n and a base-emitter voltage difference is developed across r1:
                              Δ          ⁢                                          ⁢          Vbe                =                                            kT              q                        ⁢                          ln              ⁡                              (                n                )                                              =                      Δ            ⁢                                                  ⁢                          V                              be                ⁢                                                                  ⁢                0                                      ⁢                          T                              T                0                                                                        (        1        )            Where:                k is the Boltzmann constant;        T is actual absolute temperature [° K.];        T0 is the reference temperature, usually room temperature;        q is electronic charge;        ΔVbe0 is the base-emitter voltage difference at room temperature.        
This voltage has a typical slope between 0.2 mV/C to 0.4 mV/C and is usually amplified by a factor of 5 to 10 in order to balance the base-emitter voltage slope to generate the reference voltage as FIG. 2 and Eq.2 shows:
                              V          ref                =                                            V              be                        ⁡                          (                              Q                ⁢                                                                  ⁢                3                            )                                +                                                    r                2                                            r                1                                      ⁢                          kT              q                        ⁢                          ln              ⁡                              (                n                )                                                                        (        2        )            
The resistor ratio r2/r1 represents the gain factor for ΔVbe.
Such circuits based on a CMOS process generate a voltage having significant variations from die to die mainly due to MOS transistor offset voltages. It is also a noisy reference voltage as MOS transistors generate large noise, especially low frequency noise, compared to a bipolar based bandgap voltage reference. The main offset and noise contributor of the circuit according to FIG. 4 is transistor M2 as its errors are directly reflected on r1 and are amplified from r1 to the reference voltage by the resistor ratio.
Another drawback of a circuit in this configuration is its poor Power Supply Rejection Ratio—i.e., its ability to reject variation in the supply voltage.
A typical value of a bandgap voltage reference is about 1.25V. There is more demand for lower voltage references, such as 1V or 1.024V. These reference voltages are called “sub-bandgap” voltage references, as their value is less than a normally generated bandgap voltage reference.
One sub-bandgap voltage is described in “A CMOS Bandgap Reference Circuit with Sub-1-V Operation”, Banba et al., JSSC, Vol. 34, No. 5, May 1999, pp. 670-674. This circuit can be derived from that of FIG. 4 by adding two resistors from the two amplifier's inputs to ground. As these two resistors are connected in parallel with a base-emitter voltage, a corresponding CTAT current is forced in each PMOS transistor connected at two inputs of the amplifier (M1 and M2 in FIG. 4). When the CTAT currents are balancing corresponding PTAT currents generated by the ΔVbe voltage, all PMOS mirrors will force constant currents including M3 which will force a constant voltage across a load resistor generating at the output node a temperature insensitive reference voltage.
Although this teaches the provision of a sub-bandgap reference it suffers in that the reference voltage is not corrected for the “curvature” error, which as was mentioned above is inherently present in such circuits due to second order effects. As a result it is difficult to trim it for a temperature coefficient of less than 15 ppm due to this curvature error. A modified version of this sub-bandgap voltage reference is presented on “Curvature Compensated BiCMOS Bandgap with 1V Supply Voltage”, Malcovati et al., JSSC, Vol. 36, No. 7, July 2001.
Sub-bandgap voltage references such as those described in this publication are commonly denoted as “current mode” and are dependent on MOS transistors behaviour as the two components, PTAT and CTAT currents are separately generated and combined to generate the reference voltage across a resistor.
There are variants of “voltage mode” sub-bandgap voltage references based on adding fractions of base-emitter voltage to a corresponding PTAT component to generate temperature insensitive reference voltages. A sub-bandgap voltage reference is described in: “A low noise sub-bandgap voltage reference”, Sudha, M.; Holman, W. T.; Proceedings of the 40th Midwest Symposium on Circuits and Systems, 1997. Volume 1, 3-6 Aug. 1997, pp. 193-196. This reference circuit generates a low reference voltage as a base-emitter voltage difference of two bipolar transistors operating at different current densities. The base-emitter difference is subtracted via a resistor divider. As it stands this circuit cannot be implemented in a low cost CMOS process. In order to use the reference voltage this circuit has to be followed by a gain stage. Because the reference voltage value is about 200 mV usually it needs to be amplified to 1V or more. By amplifying the reference voltage the errors of both the reference circuit and the amplifier will increase in proportion to the gain factor. This is not ideal.
A curvature-corrected sub-bandgap voltage which can be implemented on a CMOS process is described in U.S. Pat. No. 7,253,597 of A. Paul Brokaw, co-assigned to the assignee of the present invention. This circuit is based on a combination of two bipolar transistors, four resistors, an amplifier and three PMOS transistors and generates a constant current and a temperature independent voltage across a load resistor. As with other MOS variants this reference is also very much affected by offset and noise of MOS transistors.
A CMOS bandgap voltage reference was disclosed in “A method and a circuit for producing a PTAT voltage and a method and a circuit for producing a bandgap voltage reference” U.S. Pat. No. 7,193,454, co-assigned to the assignee of the present invention). In order to reduce offset and noise sensitivity due to MOS current mirrors, this circuit is based on a combination of two amplifiers, the first generating an inverse PTAT voltage and the second generating a reference voltage by mixing a base-emitter voltage of a bipolar transistor and the output voltage of the first amplifier. This circuit offers a low offset voltage and does not suffer from noise sensitivity arising from MOS current mirrors but suffers in that these benefits are achieved by increasing the circuit complexity.
The problems associated with such bandgap reference circuits are exemplary of the type of problems encountered in all reference circuits.